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GB/T 30856-2025GaAs substrates for LED epitaxial chips (English PDF)

LED外延芯片用砷化镓衬底

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Issued by

SAMR; SAC

Level / Type

National · Recommended

Issue date

August 1, 2025

Implementation date

February 1, 2026

Scope

GB/T 30856-2025 is the English-translated version of LED外延芯片用砷化镓衬底.

GB/T 30856-2025 is the Chinese national standard covering the gallium arsenide wafer an LED epitaxial layer is grown on — the n-type and p-type grades and the five diameters from 50.8 mm to 200 mm, the electrical properties, the reference flat and the notch that orient the wafer in the reactor, the surface crystal orientation and its deviation, the dislocation density, the geometric dimensions, the surface quality, and the inspection rules. Issued on 1 August 2025, it has been in force since 1 February 2026, replacing GB/T 30856-2014.

Document preview — GB/T 30856-2025

National Standard of the People's Republic of China

ICS
29.045
Classification
H 83
Replacing
GB/T 30856-2014

Issued by: State Administration for Market Regulation; Standardization Administration of the PRC

Contents

  • Foreword
  • 1 Scope
  • 2 Normative references
  • 3 Terms and Definitions
  • 4 Classification and brand
  • 4.1 Classification

Foreword

This document is in accordance with the provisions of GB/T 1.1-2020 "Guidelines for standardization work Part 1: Structure and drafting rules for standardization documents" Drafting.

This document replaces GB/T 30856-2014 "GaAs substrates for LED epitaxial chips".

In addition to structural adjustments and editorial changes, the main technical changes are as follows.

a) The specifications have been changed (see 4.1.2, 4.3 of the 2014 edition);

b) The requirements for electrical performance have been changed (see 5.1, 4.4 of the 2014 edition);

c) The requirements for reference surfaces and cutouts have been changed (see 5.2, 4.4 of the 2014 edition);

d) Changed the requirements for surface crystal orientation and crystal orientation deviation (see 5.3, 4.5 of the 2014 edition);

e) Changed the requirements for dislocation density (see 5.4, 4.6 of the 2014 edition);

f) The geometric dimension requirements have been changed (see 5.5, 4.9 of the 2014 edition);

g) Changed the surface quality requirements (see 5.6, 4.7 of the 2014 edition);

h) The test method for electrical properties has been changed (see 5.2, 4.8 of the 2014 edition);

i) The inspection method for incisions has been changed (see 6.2.3, 5.5.2 of the 2014 edition);

j) The inspection rules have been changed (see Chapter 7, Chapter 6 of the 2014 edition);

k) The logo has been changed (see 8.1, 7.1 of the 2014 edition);

l) The packaging has been changed (see 8.2, 7.2 of the 2014 edition);

m) Deleted the method of measuring substrate resistivity using a sheet resistance meter and the method of measuring substrate room temperature carrier concentration and mobility.

Method (see Appendices A and B of the 2014 edition).

Please note that some of the contents of this document may involve patents. The issuing organization of this document does not assume the responsibility for identifying patents.

This document was jointly issued by the National Technical Committee on Semiconductor Equipment and Materials Standardization (SAC/TC203) and the National Technical Committee on Semiconductor Equipment and Materials Standardization (SAC/TC203).

It is jointly proposed and coordinated by the Materials Subcommittee of the Chemical Technology Committee (SAC/TC203/SC2).

This document was drafted by: Nanjing Jiyi Semiconductor Technology Co., Ltd., Zhongshan Dehua Chip Technology Co., Ltd., Guangdong Pioneer Microelectronics Technology Co., Ltd.

Technology Co., Ltd., Quanlei Optoelectronics Co., Ltd., Shandong Inspur Huaguang Optoelectronics Co., Ltd., Yunnan Xinyao Semiconductor Materials Co., Ltd.

Dongguan Institute of Optoelectronics, Peking University, Institute of Semiconductors, Chinese Academy of Sciences, Daqing Yitai Semiconductor Materials Co., Ltd., and Easystar Optoelectronics (Guangdong) Co., Ltd., Shenzhen Guanke Technology Co., Ltd., and Guangdong Zhongyang Optoelectronics Technology Co., Ltd.

The main drafters of this document are: Zhao Zhongyang, Zheng Hongjun, Feng Jiafeng, Yu Huiyong, Liu Jianqing, Sun Xuefeng, Zhang Shuangxiang, Yan Baohua, Lin Zuoliang, Liu Qiang, Ma Jinfeng, Zhao Youwen, Zhao Chunfeng, Peng Lu, Xu Baozhou, Lan Qing, and Chen Huang.

This document was first published in 2014 and this is the first revision.

1 Scope

This document specifies the technical requirements, test methods, Inspection rules, marking, packaging, transportation, storage and accompanying documents and order form contents.

This document applies to the production, testing and quality evaluation of gallium arsenide single crystal substrates for LED epitaxial chips.

2 Normative references

GB/T 191

GB/T 1555

GB/T 2828.1-2012

GB/T 4326

GB/T 6618

GB/T 6620

GB/T 6621

GB/T 6624

GB/T 8760

GB/T 11093

GB/T 13387

GB/T 13388

GB/T 14140

GB/T 14264

GB/T 14844

GB/T 20228

3 Terms and Definitions

The terms and definitions defined in GB/T 14264 apply to this document.

4 Classification and brand

4.1 Classification

4.1.1 Gallium arsenide substrates are classified into n-type and p-type according to their conductivity type.

4.1.2 GaAs substrates are classified into five sizes based on diameter. 50.8mm, 76.2mm, 100.0mm, 150.0mm, and.200.0mm.

......
This preview omits tables, figures, formulas and parts of the technical clauses. The complete document — 15 pages — is available in the English PDF.

Referenced standards

Editions of GB/T 30856

EditionTitleRevisionStatus
GB/T 30856-2025GaAs substrates for LED epitaxial chipscurrent editionCurrent
GB/T 30856-2014GaAs substrates for LED epitaxial chipsprevious editionIn force

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