GB/T 6621-2009Testing methods for surface flatness of silicon slices (English PDF)

2.1

silicon flat in a pair of coaxial opposed capacitive displacement sensor (referred to as the probe) between a high-frequency voltage is applied to the probe, and silicon

It formed a high frequency electric field between the probe, during which each forming a capacitor. During the current probe circuit measures the amount of change that can be measured electrically

Capacitance C. As shown in Figure 1. C by the formula (1) is given by.

D --- A, the distance between the probe B;

Rao --- A probe on the surface of the distance;

Chou --- B probe and the lower surface of the distance;

1 capacitive displacement sensor method schematic

C = K

· A

Rao + + Chou

C0 (1)

Where.

C --- between the upper and lower surface of the wafer probe and the measured total capacitance in farads (F);

K --- permittivity of free space in farad per meter F/m;

A --- probe surface area, in square meters (m2);

Rao --- A probe on the surface distance in meters (m);

Chou --- B probe and the lower surface of the distance in meters (m);

C0 --- mainly by the probe structure and parasitic capacitance in farads (F).

2.2

Since when measuring the distance D between the probe and the next two probes to the lower surface of the distance Chou has been fixed at the time of calibration, the instrument

The measured capacitance value C according to equation (1) is calculated, you can get Rao, thereby calculating the wafer surface flatness and other geometrical parameters.

2.3

Select the appropriate reference plane and the focal plane in order to calculate the required parameters.