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GB/T 7092-2021Outline dimensions of semiconductor integrated circuits (English PDF)

半导体集成电路外形尺寸

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Issued by

SAMR; SAC

Level / Type

National · Recommended

Issue date

March 9, 2021

Implementation date

October 1, 2021

Scope

GB/T 7092-2021 is the English-translated version of 半导体集成电路外形尺寸.

GB/T 7092-2021 specifies the package outlines and dimensions of semiconductor integrated circuits, for use in package design and in checking the dimensions of finished products.

Hybrid integrated circuits are excluded. It groups outlines into metal, ceramic and plastic packages, sets the rules for dimensions and tolerances and classifies and codes outlines according to GB/T 15879.4-2019.

The main part gives outline drawings and dimension parameters for 29 package families, from metal cylindrical, flange (TO-254, TO-257) and pad (SMD) packages through ceramic CDIP, CLCC, CFP, CPGA, CLGA, CBGA and CCGA types to plastic TO-92, dual in-line, small outline, quad flat, leadless and ball grid array series.

Annexes describe the outline changes, the dimension symbols and a simple identification code. It replaces GB/T 7092-1993, was issued on 9 March 2021 and has applied since 1 October 2021.

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Document preview — GB/T 7092-2021

National Standard of the People's Republic of China

ICS
31.200
Classification
L 55
Replacing
GB/T 7092-1993

Issued by: State Administration for Market Regulation; Standardization Administration of the PRC

Contents

  • Foreword
  • 1 Scope
  • 2 Normative references
  • 3 Package outline
  • 3.1 Metal package
  • 3.2 Ceramic package
  • 3.3 Plastic package
  • 4 Dimensions and tolerances
  • 5 Package outline classification and coding
  • 6 Product outline drawing and size parameters
  • 6.1 General
  • 6.2 Metal cylindrical package
  • 6.3 Metal diamond package (F-1, F-2)
  • 6.4 Metal flange package (TO-254, TO-257)
  • 6.5 Metal pad package (SMD-0.5, SMD-1)
  • 6.6 Ceramic Dual In-line Package (CDIP)
  • 6.7 Ceramic glass fused dual in-line package (GDIP)
  • 6.8 Ceramic Leadless Chip Carrier Package (CLCC)
  • 6.9 Ceramic Flat Package (CFP)
  • 6.10 Ceramic glass fused flat package (GFP)
  • 6.11 Ceramic dual-row no-lead flat package (CDFN)
  • 6.12 Ceramic Small Outline Package (CSOP)
  • 6.13 Ceramic glass fused small outline package (GSOP)
  • 6.14 Ceramic Quad Flat Package Series
  • 6.15 Ceramic Pin Grid Array Package (CPGA)
  • 6.16 Ceramic Pin Grid Array Package (Staggered) (CIPGA)
  • 6.17 Ceramic Land Array Package (CLGA)
  • 6.18 Ceramic Ball Array Package (CBGA)
  • 6.19 Ceramic Pillar Array Package (CCGA)
  • 6.20 Plastic Cylindrical Package (TO-92)
  • 6.21 Plastic flange package series
  • 6.22 Plastic single in-line package series
  • 6.23 Plastic dual in-line package series
  • 6.24 Plastic dual-row no-lead flat package series (PVDFN, PWDFN, PUDFN, PXDFN)
  • 6.25 Plastic small outline package series (first category)
  • 6.26 Plastic Small Outline Package Series (Class 2)
  • 6.27 Plastic Quad Flat Package Series
  • 6.28 Plastic four-side leadless flat package series (PQFN, PLQFN, PTQFN, PVQFN, PWQFN, PUQFN, PXQFN, PPQFN)
  • 6.29 Plastic land array package series (PLGA, PLLGA, PTLGA, PVLGA, PWLGA, PULGA, PXLGA)
  • 6.30 Plastic solder ball array package series (PB1BGA, PBBGA, PBGA, PLBGA, PTBGA, PVBGA, PWBGA, PUBGA, PXBGA)
  • Appendix A (informative appendix) Description of package outline changes
  • Appendix B (normative appendix) Outline dimension symbol description
  • Appendix C (informative appendix) Simple identification code of package outline

Foreword

This standard was drafted in accordance with the rules given in GB/T 1.1-2009.

This standard replaces GB/T 7092-1993 "Semiconductor Integrated Circuit Dimensions", and the main technical changes compared with GB/T 7092-1993 Change as follows.

---Modified the packaging outline coding rules, and the content quoted GB/T 15879.4-2019 (see Chapter 5, Appendix A of the 1993 edition);

---Modified the package shape classification, and added a number of metal packages, ceramic packages and plastic packages. For details, see Appendix A;

---Modified the outline dimension symbol description (see Appendix B, Appendix B of the 1993 edition);

---The simple identification code of the package shape has been added (see Appendix C).

1 Scope

This standard specifies the packaging form and dimensions of semiconductor integrated circuits.

This standard applies to the packaging design and finished product size inspection of semiconductor integrated circuits. This standard does not apply to hybrid integrated circuits.

2 Normative references

The following documents are indispensable for the application of this document. For dated reference documents, only the dated version applies to this document. For undated reference documents, the latest version (including all amendments) is applicable to this document.

GB/T 1182 Geometric Technical Specification for Products (GPS) Geometric Tolerance Shape, Direction, Position and Runout Tolerance Marking

GB/T 1958 Product Geometric Technical Specification (GPS) Geometric Tolerance Testing and Verification

GB/T 15879.4-2019 Mechanical standardization of semiconductor devices Part 4: Classification and coding system of semiconductor device package outlines

3 Package outline

3.1 Metal package

The main categories of metal package outlines are as follows.

a) Metal cylindrical package;

b) Metal diamond package series.

1) Metal diamond package (F-1);

2) Metal diamond package (F-2);

c) Metal flange package series.

1) Metal flange package (TO-254);

2) Metal flange package (TO-257);

d) Metal pad package series.

1) Metal pad package (SMD-0.5);

2) Metal pad package (SMD-1).

3.2 Ceramic package

The main categories of ceramic package outlines are as follows.

a) Ceramic dual in-line package (CDIP);

b) Ceramic glass fused dual in-line package (GDIP);

c) Ceramic leadless chip carrier package (CLCC);

d) Ceramic flat package (CFP);

e) Ceramic glass fused flat package (GFP);

f) Ceramic dual-row no-lead flat package (CDFN);

g) Ceramic small outline package (CSOP); […]

......
This preview omits tables, figures, formulas and parts of the technical clauses. The complete document — 390 pages — is available in the English PDF.

Referenced standards

Similar standards

Editions of GB/T 7092

EditionTitleRevisionStatus
GB/T 7092-2021Outline dimensions of semiconductor integrated circuitscurrent editionCurrent
GB/T 7092-1993Outline dimensions of semiconductor integrated circuitsprevious editionSuperseded

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