GB/T 37979-2019Safe rule of VHDL for programmable logic device software (English PDF)
可编程逻辑器件软件VHDL编程安全要求
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Issued by
SAMR; SAC
Level / Type
National · Recommended
Issue date
August 30, 2019
Implementation date
March 1, 2020
Scope
GB/T 37979-2019 is the English-translated version of 可编程逻辑器件软件VHDL编程安全要求.
GB/T 37979-2019 is the Chinese standard "Safe rule of VHDL for programmable logic device software". Its scope clause reads: This standard specifies the safety rules for VHDL software programming for programmable logic devices.
This standard applies to the programming safety design, coding, testing and use of programmable logic device software VHDL. ASIC digital circuit It can also be used for reference during design. Its clauses include terms and definitions; abbreviations; security rules.
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Document preview — GB/T 37979-2019
National Standard of the People's Republic of China
- ICS
- 35.080
- Classification
- L 77
Issued by: State Administration for Market Regulation; Standardization Administration of the PRC
Contents
- Foreword
- 1 Scope
- 2 Normative references
- 3 Terms and Definitions
- 4 Abbreviations
- 5 Security Rules
- 5.1 instantiation class
- 5.2 Structural Design Class
- 5.3 Sensitive List Class
- 5.4 Declaration Definition Class
- 5.5 Named Class
- 5.6 Operation class
- 5.7 Loop Control Class
- 5.8 Branch Control Class
- 5.9 Clock Class
- 5.10 Reset and Initialization Class
- 5.11 State Machine Class
- 5.12 Synthesis/Constraint Class
- 5.13 Annotation Class
- 5.14 Encoding Format Class
1 Scope
This standard specifies the safety rules for VHDL software programming for programmable logic devices.
This standard applies to the programming safety design, coding, testing and use of programmable logic device software VHDL. ASIC digital circuit
It can also be used for reference during design.
2 Normative references
The following documents are indispensable for the application of this document. For dated references, only dated versions apply to this article.
Pieces. For undated references, the latest edition (including all amendments) applies to this document.
GB/T 11457-2006 Information Technology Software Engineering Terminology
GB/T 33781-2017 General requirements for software development of programmable logic devices
3 Terms and definitions
The terms and definitions defined in GB/T 11457-2006 and GB/T 33781-2017 apply to this document.
4 Abbreviations
The following abbreviations apply to this document.
FPGA. Field Programmable Gate Array (FieldProgrammableGateArray)
VHDL. Very high speed integrated circuit hardware description language (Very-high-speedintegratedcircuitHardwareDescription
Language)
5 Security Rules
5.1 instantiation class
5.1.1
Port instantiation should adopt name mapping to avoid location mapping.
When port instantiation is performed, name mapping should be adopted to avoid location mapping, which is beneficial to improve the readability and maintainability of the program.
Example.
Follow the example
Port instantiation takes name mapping
Reset_filter_inst.reset_filter
Portmap(reset_in = >reset_in,
Clk = >clk,
Reset_out = >reset_out);
......
This preview omits tables, figures, formulas and parts of the technical clauses. The complete document — 35 pages — is available in the English PDF.
Referenced standards
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