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GB/T 4937.26-2023Semiconductor devices - Mechanical and climate test methods - Part 26: Electrostatic discharge(ESD)sensitivity testing - Human body model(HBM) (English PDF)

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Issued by

State Administration for Market Regulation, China National Standardization Administration

Level / Type

National · Recommended

Issue date

September 7, 2023

Implementation date

April 1, 2024

Scope

GB/T 4937.26-2023 (Semiconductor devices - Mechanical and climate test methods - Part 26: Electrostatic discharge(ESD)sensitivity testing - Human body model(HBM)) is available as an English-translated PDF.

GB/T 4937.26-2023 is the Chinese standard "Semiconductor devices - Mechanical and climate test methods - Part 26: Electrostatic discharge(ESD)sensitivity testing - Human body model(HBM)".

Its scope clause reads: This document is based on the susceptibility of components and microcircuits to damage or degradation caused by electrostatic discharge (ESD) specified on the Human Body Model (HBM). degree, and established ESD testing, evaluation and grading procedures for components and microcircuits.

The purpose of this document is to establish a test method that can reproduce HBM failures and provide reliable and repeatable testing methods for different types of components.

Duplicate HBMESD test results, and the test results do not change due to the test equipment. Repeatable data ensures HBMESD sensitivity Accurate classification and comparison of grades.

ESD testing of semiconductor devices is based on this test method, the machine model (MM) test method (see IEC 60749-27) or IEC 60749 (All sections). Unless otherwise specified, this test method is the chosen method. Its clauses include normative reference documents; terms and definitions.

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Document preview — GB/T 4937.26-2023

National Standard of the People's Republic of China

ICS: 31.080.01
Classification: L 40

Issued by: State Administration for Market Regulation, China National Standardization Administration

Preface
Introduction
1 Scope
2 Normative reference documents
3 Terms and Definitions
4 Instruments and Equipment
4.1 Waveform confirmation equipment
4.2 Oscilloscope
4.3 Additional requirements for digital oscilloscopes
4.4 Current sensor (induced current probe)
4.5 Evaluation load
4.6 Human Body Model Simulator
4.7 HBM test equipment parasitic characteristics
5 Stress testing equipment verification and routine validation
5.1 General requirements for HBM test equipment evaluation
5.2 Test procedure
5.3 HBM test equipment verification
5.4 Test fixture board verification for socket-based test equipment
5.5 General waveform inspection requirements
5.6 High voltage discharge path inspection
5.7 Test equipment waveform recording
5.8 Security
6 Grading Procedure
6.1 Device Classification
6.2 Parameter and functional testing
6.3 Device stress test
6.4 Pin classification
6.5 Pin grouping
6.6 Pin stress combination
6.7 HBM stress for low parasitic simulator
6.8 Post-stress testing
7 Failure criteria
8 Device Classification
Appendix A (informative) HBM test method flow
Appendix B (informative) HBM test equipment parasitic characteristics
Appendix D (Informative) Coupled Non-Power Pin Pair Example
Appendix E (normative) Sampling test method for non-power supply (I/O) pins with the same name

1 Scope

This document is based on the susceptibility of components and microcircuits to damage or degradation caused by electrostatic discharge (ESD) specified on the Human Body Model (HBM).

degree, and established ESD testing, evaluation and grading procedures for components and microcircuits.

The purpose of this document is to establish a test method that can reproduce HBM failures and provide reliable and repeatable testing methods for different types of components.

Duplicate HBMESD test results, and the test results do not change due to the test equipment. Repeatable data ensures HBMESD sensitivity

Accurate classification and comparison of grades.

2 Normative reference documents

This document has no normative references.

3 Terms and definitions

The following terms and definitions apply to this document.

3.1 associatednon-supplypin

A non-power pin (usually an I/O pin) connected to a power pin group.

Note. A non-power pin is considered to be interconnected with the power pin group if one of the following conditions exists.

a) Functional implementation of circuits (I/O drivers) connected to non-power supply pins (high/low impedance) requires current provided by the power supply pin group (e.g. VDDIO);

b) There is a parasitic circuit between the non-power pin and the power pin group (such as an open-drain non-power pin to a nearby N-well guard ring).

VCC power pin set).

3.2 Clonednon-supply(I/O)pin with the same name

A group of outputs that have the same I/O elements, circuit principles, and share the same interconnected power pins (sets) including ESD power clamps.

input, output or bidirectional pins.

3.3 component

A basic unit capable of controlling electrical signals, such as a resistor, diode, transistor, integrated circuit, or hybrid circuit.

3.4 component

The component under test does not meet one or more static or dynamic parameters specified in the product data.

SJ/T 11141 | GB/T 18910.2 | GB/T 4937.28 | GB/T 4937.29 | GB/T 4937.25 | […]

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This preview omits tables, figures, formulas and parts of the technical clauses. The complete document — 77 pages — is available in the English PDF.

Referenced standards

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