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GB/T 33781-2017General requirements for programmable logic device software development (English PDF)

可编程逻辑器件软件开发通用要求

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Issued by

SAMR; SAC

Level / Type

National · Recommended

Issue date

May 31, 2017

Implementation date

December 1, 2017

Scope

GB/T 33781-2017 is the English-translated version of 可编程逻辑器件软件开发通用要求.

GB/T 33781-2017 sets the general requirements for developing the software of programmable logic devices in China.

It fixes the life cycle framework of such software, the integrity level, reuse, production management, reliability and safety, and confidentiality and virus protection, then the aims and technical requirements of each stage: system requirements analysis, software requirements analysis, design, implementation, validation testing, acceptance and delivery, operation and maintenance, configuration management, quality assurance, corrective action, verification, risk management, security management, subcontractor management and coordination with the parties involved.

A normative annex lists the technical documents. Clause 3 defines the programmable logic device, the complex programmable logic device, the field programmable gate array, the hardware description language, the device software itself and logic synthesis. It was issued on 31 May 2017 and has applied since 1 December 2017.

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Document preview — GB/T 33781-2017

National Standard of the People's Republic of China

ICS: 35.080
Classification: L 77

Issued by: State Administration for Market Regulation; Standardization Administration of the PRC

Preface
1 Scope
2 normative reference document
3 terms, definitions and abbreviations
3.1 Terms and definitions
3.2 Abbreviations
4 General requirements
4.1 programmable logic device software life cycle framework
4.2 Integrity Level
4.3 reuse
4.4 Production Management
4.5 Reliability and Safety
4.6 Confidentiality and Virus Protection
5 detailed requirements
5.1 System requirements analysis
5.2 Software requirements analysis
5.3 Design
5.5 Confirmation of test
5.6 Acceptance and delivery
5.7 Operation and maintenance
5.8 Configuration Management
5.9 Quality Assurance
5.10 Corrective action
5.11 Verification
5.12 Risk Management
5.13 Security Management
5.14 Subcontractor Management
5.15 Coordination with related parties
Appendix A (Normative Appendix) Programmable Logic Device Software Technical Documentation List

Foreword

This standard is drafted in accordance with the rules given in GB/T 1.1-2009.

1 Scope

This standard specifies the programmable logic device software development process of the relevant requirements, provides a programmable logic device software development process The life cycle of each stage of the target, technical requirements.

This standard applies to the development of programmable logic device software.

2 Normative reference documents

The following documents are indispensable for the application of this document. For dated references, only the dated edition applies to this document. For undated references, the latest edition (including all modifications) applies to this document.

GB/T 11457-2006 Information technology - Software engineering terminology

GB/T 18492-2001 Information technology - System and software integrity levels

GB/T 20158-2006 Information technology - Software life cycle process configuration management

GB/T 33783-2017 Programmable Logic Device Software Testing Guide

GB/T 33784-2017 Programmable Logic Device Software Development Documentation Specification

3 Terms, definitions and abbreviations

3.1 Terms and definitions

The following definitions and definitions as defined in GB/T 11457-2006 apply to this document.

3.1.1 Programmable logic device

A device that allows the user to program (configure) the desired logic function.

3.1.2 Complex programmable logic device

By a combination of multiple logic modules, and by a programmable connection to form a complete logical circuit of the device.

3.1.3 Field Programmable Gate Array

By the configurable logic unit, input and output modules and internal connections and other components of the device.

3.1.4 Hardware description language

A language used to model, design, and emulate hardware functions.

3.1.5 Programmable logic device software

For FPGA, CPLD and other programmable logic devices designed to produce the procedures, documents and data.

3.1.6 Logic synthesis

Converts the design input into a logical netlist consisting of the basic logic unit, optimizes and outputs the netlist file according to the constraints,

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This preview omits tables, figures, formulas and parts of the technical clauses. The complete document — 15 pages — is available in the English PDF.

Referenced standards

Normative references

GB/T 20158-2006

Cited by

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