GB/T 47239.9-2026Semiconductor devices - Flexible and stretchable semiconductor devices - Part 9: Performance testing methods of one transistor and one resistor (1T1R) resistive memory cells (English PDF)

Foreword

This document complies with the provisions of GB/T 1.1-2020 "Standardization Work Guidelines Part 1: Structure and Drafting Rules of Standardization Documents".

Drafting.

This document is Part 9 of GB/T 47239 "Semiconductor Devices - Flexible and Stretchable Semiconductor Devices". GB/T 47239 has been issued.

The following parts were laid out.

---Part 8: Test methods for the ductility, flexibility and stability of flexible resistive memory;

---Part 9: Performance testing method for one-transistor-one-resistor (1T1R) memory cell.

This document is modified to adopt IEC 62951-9:2022 "Semiconductor devices - Flexible and stretchable semiconductor devices - Part 9: Transistors -Performance testing method for resistive (1T1R) memory cells.

This document has undergone the following structural adjustments compared to IEC 62951-9:2022.

---Add 3.5, and the subsequent item numbers will be sequentially updated;

---5.2~5.8 correspond to 5.2.1~5.2.7 in IEC 62951-9:2022 respectively, and 5.9 corresponds to 5.3 in IEC 62951-9:2022.

The technical differences between this document and IEC 62951-9:2022, and the reasons therefor, are as follows.

---The limitation on unipolar types has been removed (see Chapter 1), and the method described in this document is applicable to both unipolar and bipolar 1T1R circuits.

Ignition memory cell;

---Add the term and definition "top electrode voltage" (see 3.5) to meet usage requirements;

---The definitions of "low-resistance value" and "high-resistance value" have been revised (see 3.8 and 3.9) to align with industry understanding;

---Change the high-temperature test condition from "three different ambient temperatures above 175°C" to "three different ambient temperatures above 150°C".

"degree" (see 5.8) to conform to industry practice.

The following editorial changes have been made to this document.

---The descriptions of Figure 2 in 5.1, Figure 4 in 5.3, and Figure 15 in 5.8 have been corrected to match the content in the figures;

---The irrelevant content in footnote a of Figure 6 in section 5.4 has been deleted;

---In Figure 4, labels and distinctions have been added for the high-resistance state resistance value and the low-resistance state resistance value;

---The minimum durability cycle count recommended in 5.7 has been corrected to 106 cycles;

---The indexing symbols in Figures 11 and 13 have been corrected to "RLRS and RHRS" to be consistent with the symbols given in Chapter 3;

---In Figure 12, "x > 106" should be corrected to "n > 106";

---Add a note to Figure 9 to explain the symbols in the figure.

Please note that some content in this document may involve patents. The issuing organization of this document assumes no responsibility for identifying patents.

This document was proposed by the Ministry of Industry and Information Technology of the People's Republic of China.

This document is under the jurisdiction of the National Semiconductor Device Standardization Technical Committee (SAC/TC78).

Introduction

Flexible and stretchable semiconductor devices possess characteristics such as stretchability, bendability, deformability, light weight, and variable shape, and can be used in robotic skin, etc.

Applications include wearable devices, optoelectronic products, and energy storage products. This is driven by advancements in semiconductor device technology and the development of flexible, stretchable semiconductor devices.

The widespread application of semiconductors has placed higher demands on product quality and reliability. GB/T 47239 "Flexible and Stretchable Semiconductor Devices" the "Semiconductor Devices" standard is a fundamental standard for testing and experimenting with flexible and stretchable semiconductor devices, and is essential for evaluating the performance of these devices.

It plays an important role in energy, stability, and reliability. It is planned to consist of 9 parts.

---Part 1: Bending Test Methods for Conductive Thin Films on Flexible Substrates. The purpose is to specify the bending test methods for conductive thin films on flexible semiconductor substrates.

Curved test method.

---Part 2: Evaluation Methods for Electron Mobility, Subthreshold Swing, and Threshold Voltage of Flexible Devices. The aim is to define the evaluation methods for flexible devices under bending conditions.

Evaluation methods for electrical parameters such as mobility, subthreshold swing, and threshold voltage of flexible thin-film transistor devices.

---Part 3: Performance Evaluation of Thin Film Transistors on Flexible Substrates in a Raised State. The aim is to define the evaluation criteria for flexible substrates in a raised state.

Methods for understanding the characteristics of thin-film transistors under certain conditions.

---Part 4: Fatigue Evaluation of Flexible Conductive Thin Films on Flexible Semiconductor Device Substrates. The aim is to specify the requirements for flexible semiconductor device substrates.

A fatigue evaluation method for flexible conductive films on a board.

---Part 5: Test methods for thermal properties of flexible materials. The purpose is to specify the test methods for the thermal properties of flexible materials.

---Part 6: Methods for testing the sheet resistance of flexible conductive films. The purpose is to specify the methods for testing the sheet resistance of flexible conductive films.

method.

---Part 7: Test Methods for Barrier Properties of Flexible Organic Semiconductor Packaging Films. The purpose is to specify the barrier properties of flexible organic semiconductor packaging films.

Test methods for membrane barrier properties.

---Part 8: Test methods for the ductility, flexibility, and stability of flexible resistive memory. The purpose is to specify the requirements for flexible resistive memory.

Terminology and definitions, as well as testing equipment and procedures for ductility, flexibility and stability.

---Part 9: Performance Test Methods for One-Transistor-One-Resistor (1T1R) Resistive Storage Cells. The purpose is to specify the performance test methods for one-transistor-one-resistor storage cells.

Terminology and definitions for resistive (1T1R) memory cells, and test apparatus and test stimuli for the performance parameters of resistive memory cells.

and testing process.

GB/T 47239 (all parts) are all one-to-one correspondences with IEC 62951 (all parts), through the standardization of flexible and stretchable semiconductors.

Testing and experimental methods for components support the development of the flexible semiconductor device industry.

Flexible and stretchable semiconductor devices Part 9: Transistor-Resistor (1T1R) Performance testing methods for resistive memory cells

1 Scope

This document describes the performance testing method for a transistor-resistive (1T1R) memory cell.

The performance tested by the company includes reading, electrical preprocessing, setting, resetting, durability, and retention.

This document applies to both flexible and rigid resistive storage devices, and is not limited by the device's manufacturing process or size.

2 Normative references

This document has no normative references.

3 Terms and Definitions

The following terms and definitions apply to this document.

Semiconductor devices used to amplify, limit, or alter electrical signals and power.

source voltage

The bias voltage applied to the source of the programmable transistor.

gate voltage

The bias voltage applied to the gate of the programmable transistor.

Drain voltage

The bias voltage applied to the drain of the programmable transistor.

A bias voltage is applied to the top electrode of the resistive memory.

resistive memory

Based on the reversible formation and reversible breakage of conductive filaments within the active layer, two-terminal devices with low-resistivity and high-resistivity states are defined respectively.